The more i look at the longan nano (GD32FV103 based), the more i like it.
I've played in the past with other Gigadevice chips, in particular the GD32F303 and i liked them a lot.
Our goal is to have something similar to the Cmake build + Roger Clark STM32Duino we were using so far : Cmake based, ~ Arduino compatible, much more powerful with DMA support & all.
So let's look deeper.
What is the LongNano ?
In short, it's a chinese bluepill based on a riscv32 chip the GD32FV103.
It is a very complete chip/board even more so than the bluepill . It has 128 kB of flash, 32 kB of sram and runs at 108 Mhz.
The longan nano board comes with a small 160x80 spi color LCD (optional) and a sdcard reader
Connectivity difference with bluepill
The usb connector is usb type C. I'm pretty sure it's internally usb2.0 with just the type C connector.
On one end of the board, there are 8 pins : debug interface (jtag) + serial port 0
In order to debug, you'll absolutely need a usb/jtag interface. The most commonly and cheap ones are either FTDI2232H or FTDI UM232H. You can find them for cheap on ebay.
Tools
In order to use the board, you'll need a toolchain. The toolchain can be obtained directly from riscv github repository
https://github.com/riscv/riscv-gnu-toolchain
The GD32 chip is RV32IMAC compliant, so the configuration for the above toolchain should be
--with-arch=rv32imac --with-abi=ilp32 --disable-multilib
OpenOcd
You'll need a specific version of openOcd to act as a gdb proxy for the fttdi chip
https://github.com/riscv/riscv-openocd.git
Make sure you have libftdi installed !
The debug setup will be
Longan Nano => FTDI=>USB=>OpenOCD => riscv32xxxxgdb
Software framework
Arduino
There is a preliminary arduino port available here :
https://github.com/mean00/Longduino_cmake.git
It is using the gigadevice low level peripheral library and is very incomplete compared to roger clark stm32 port. But at least it can be used as a starting point.
FreeRTOS
The freeRTOS RISCV support is still very immature and targets mostly the sifive chips.
The RISCV ecosystem makes it difficult as the chips are actually very different even if they share a most common denominator subset.
As a result, contrarily to Arm, it is difficult to have a common source tree with minor change for a specific vendor.
As an example, the GD32FV103 has an enhanced interrupt controller (ECLIC) with some nice features.
Fortunately there is a freeRTOS port for the GD32FV103:
https://github.com/QQxiaoming/gd32vf103_freertos.git
We just need the N200 subfolder to glue on top of a up to date FreeRTOS
That freeRTOS port is different from the mainline one.
The mainline one directly manipulates the registers to enable / disable interrupt and use ECALL to do task switching.
From what i've seen (might be wrong here), QQxiaoming version differs as :
- It is using a sw interrupt (glued to the timer) to do task switching
- It is using ECALL to enable/disable interrupt (optional)
- It is using the GD32FV103 / ECLIC enhanced capabilities
- It is using some N200 specific functions to easily add a preamble/postable to interrupt handler. That way interfacing with freeRTOS is trivial.
It is far more advanced than a minimalistic port.
It feels like it 's made to run with very low privilege (user) as far as tasks are concerned.
Lib & codesize
The first version of our FreeRTOS blinky was working fine, but was big : ~ 100 kB !
First usual suspect: Make sure to add -fno-rtti -fno-exceptions to the c++ code
Second usual suspect : use the nano specs
Third usual suspect: Rewrite malloc/free/new / delete to use freeRTOS memory management and avoid having malloc/new pull some nasty stuff.
End result :
98%] Linking CXX executable hello.elf
Memory region Used Size Region Size %age Used
flash: 28144 B 256 KB 10.74%
ram: 32 KB 32 KB 100.00%
25 kB with C/C++/GD32 peripherals & minimalistic Arduino support.
Nice !
Nb: Ignore the 256 kB flash, i faked a bigger chip to investigate something.
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